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Sunday March 4, 2018
Sunday March 4, 2018
BiTS 2018 will feature two Optional Tutorials. You may register for the Tutorials and attend either or both.
Please note: attendance at the tutorials will be limited. Please sign-up early to not miss out!
Selection and proper application of thermal interface materials (TIMs) for semiconductor test and burn-in is challenging. TIMs are available in an astounding array of technologies and chemistries, types, materials, performance ranges, attachment methods, and specific application purposes. There are in fact thousands of such different thermal materials available from several hundred vendors globally. The demanding performance requirements for test and burn-in applications are highly varied and the intent of this tutorial is to provide a useful and practical understanding of TIM technology and application.
This tutorial will provide a description of the most useful terminologies, the range of purposes for which TIMs are design, identification of practical data sheet values for comparative purposes, a short identification of thermal performance testing methodologies, test equipment manufacturers, and identification of fourteen categories of TIMs. An example of a material selection methodology is presented, with categorization of different values, including thermal, chemical, and electrical properties; toxicity and safety and storage considerations; and related topics. Proper selection of mounting hardware and applied pressure for a given application is reviewed since these factors are critical to maximize thermal performance for several TIM categories.
Reliability is addressed for common material types, including potential outgassing, mechanical pump-out, and other factors that vary depending on the material type, chemistries, and application environment. Several new and under development material types will be shown, including materials developed specifically for test and burn-in applications. Current reliability test programs for test and burn-in applications will also be described, with test results expected later in 2018.
Target Audience: This tutorial is designed for a range of attendees, including electrical and mechanical engineers who must develop thermal hardware solutions, as well as test and burn-in industry engineers and managers. Attendees are expected to include semiconductor test equipment manufacturers, test engineers, manufacturers of test heads and thermal solutions, and semiconductor engineers. The tutorial will provide a practical understanding of TIM types, performance, reliability, and applications, focusing on semiconductor testing.
David L. Saums has thirty-nine years of business development and technical marketing experience with advanced packaging and thermal materials, components, and two-phase liquid cooling systems. He has chaired or given technical conference presentations in eight countries on thermal management topics. Dave is general chair for the International Microelectronics Assembly and Packaging Society (IMAPS) Advanced Technology Workshop (ATW) on Thermal Management (eighteen years); is a member of the organizing committee for the IMAPS France thermal and packaging workshop (fourteen years), and served as general chair for Semitherm in 2006. In 2003 Dave founded a full-time consulting business in electronics thermal management. His consulting work focuses on thermal materials development; co-efficient of thermal expansion(CTE)-matched thermal composites used as semiconductor module heat spreaders and baseplates; two-phase liquid cooling technologies and systems; chiller systems for electronic systems; and thermal materials test equipment. Previously, Dave worked in technical marketing and business development for twenty-five years with manufacturers of thermal materials, liquid cold plates and heat sinks, and military-grade air moving devices.
Refreshment break and networking time for Tutorial attendees.
This tutorial will be an across the board (pun intended) look at those printed wiring boards (PWBs) sitting under your socket, in your wafer probe card, or part of your test system. Our focus will be the attributes, materials and processes required to produce those test interface boards we know you’ve been dying to learn more about. We attempt to bring the board shop to you, giving you a better understanding of what you and your vendors are up against.
A brief history of the printed wiring/circuit board (PWB / PCB) industry in general and specifically in relation to the automated test equipment (ATE) industry will be covered. We explain how pitch, layer count, overall thickness, and hole diameter, to name but a few of the most critical attributes, impact the manufacturing (and cost $$$) of today’s test interface boards. The many options currently available for materials and how those options may be shrinking, right along with device pitch and wavelength (increasing device and data speeds) will be reviewed.
The entire PWB manufacturing process - from raw materials through finished product - will be explained in detail using new visual aids as well as a hands-on exhibit of a PWB in all of its process stages.
Lastly, quality and performance characteristics you can demand of your supplier(s) will be discussed. Even with today’s boards becoming more crowded (with components) and pitch and pin counts driving attributes ever smaller, there are ways to verify and validate the quality of your interface boards with your suppliers. We’ll show you how, with samples of data gathered over years of process development, characterization, and verification.
Target Audience: Test Engineers, Test Technicians, Application Engineers, and others who want to know more details of just what a printed circuit board is (and isn’t) will find this an excellent tutorial on printed circuit manufacturing. This is a rare opportunity where attendees, whose work in the test and burn-in arena would benefit from a deeper understanding of printed wiring / circuit board (PWB/PCB) technology, can participate in a concentrated tutorial and come away with a new-found understanding of their suppliers’ limitations and excellence.
Tom Bresnan is an Account Manager & Technical Sales Engineer with R&D Altanova in South Plainfield, NJ since 2003. His more than 30 years of printed circuit manufacturing experience includes positions in various engineering, management and sales roles for some of the world’s largest manufacturers of complex printed circuit boards, including; Hadco, Multek, and Sanmina-SCI. Tom is a distinguished lifetime member of the IPC Technical Activities Executive Committee. He has presented and published numerous technical articles for the printed wiring / circuit board (PWB/PCB) industry on laminated multi-chip modules (MCM-Ls) and advanced plating capabilities.
If this is your nineteenth time attending BiTS Workshop, only your first, or somewhere in-between you will feel welcomed at the opening reception by friends old and new.
The first of many excellent meals awaits as you get to network with other industry professionals. This is a great time to catch up with old colleagues or start meeting new friends.
Everyone who attends BiTS expects to hear what’s Now & Next in test and burn-in technology. In this widely anticipated session, we go further to report on the business context of the test consumables market. First we'll hear about the technical and market forces that are shaping the future of test and burn-in. There is never a shortage of challenges due to rapid technology changes coupled with the continual need for reduced costs. Semiconductors had an exceptional year in 2017 and 2018 is shaping up to be another great year. How did socket and contactor suppliers fare? Who were the top suppliers? We’ll hear the results in the Marketplace Report. We will also take a closer look at what is happening financially in the short-term and review the long-term market drivers for test and burn-in sockets.
Program subject to change without notice.